A Dynamic Memory Allocation Optimization Mechanism Based on Spark

Spark is a distributed data processing framework based on memory. Memory allocation is a focus question of Spark research. A good memory allocation scheme can effectively improve the efficiency of task execution and memory resource utilization of the Spark. Aiming at the memory allocation problem in the Spark2.x version, this paper optimizes the memory allocation strategy by analyzing the Spark memory model, the existing cache replacement algorithms and the memory allocation methods, which is on the basis of minimizing the storage area and allocating the execution area according to the demand. It mainly including two parts: cache replacement optimization and memory allocation optimization. Firstly, in the storage area, the cache replacement algorithm is optimized according to the characteristics of RDD Partition, which is combined with PCA dimension. In this section, the four features of RDD Partition are selected. When the RDD cache is replaced, only two most important features are selected by PCA dimension reduction method each time, thereby ensuring the generalization of the cache replacement strategy. Secondly, the memory allocation strategy of the execution area is optimized according to the memory requirement of Task and the memory space of storage area. In this paper, a series of experiments in Spark on Yarn mode are carried out to verify the effectiveness of the optimization algorithm and improve the cluster performance.     

Reliable techniques for integrated circuit identification and true random number generation using 1.5-transistor flash memory

Flash memory bits, like other integrated circuit (IC) devices, are prone to random variability in their actual versus nominal characteristics. We present the use of 1.5-transistor flash memory cells in physically unclonable functions leveraging their erase speed variability. This type of memory is interesting for the internet of things due to its wide availability as intellectual property at foundries. Using experimentally measured results, we show simple methods that provide high reliability with no or limited need for helper data and error correction. High quality fingerprints for IC identification are demonstrated. Moreover, techniques to remove systematic variations from the array response are shown, allowing the resulting binary strings to pass all National Institute of Standards and Technology tests for randomness. Consequently, with low complexity helper functions, true random numbers can be readily produced.     

表面织构形状对牙轮钻头轴承摩擦学性能影响的实验研究

牙轮钻头滑动轴承作为钻头破岩过程中传递载荷的关键部件,在低速重载的钻井过程中易发生黏着磨损失效。为改善牙轮钻头滑动轴承的耐磨性能,利用纳秒激光雕刻技术,在牙轮钻头滑动轴承轴颈表面加工了面积比为10%、深度为20μm的圆形、矩形、三角形及复合织构;基于赫兹相似理论,设计近似模拟钻头轴承工况的环-块配对副单元实验方案,并在UMT摩擦试验机上开展织构形状对钻头滑动轴承摩擦副摩擦因数、磨损量、温升变化和微观形貌影响规律的实验研究。结果表明:仿生织构的形状及布置方式对减摩和耐磨效果影响极大,其中圆形、矩形织构的减摩和耐磨性能最优,其次为三角形织构,而复合织构反而增大了摩擦因数及磨损量;单一织构对试件磨损量及温升的影响不大,而复合织构在增加摩擦的同时温度有明显升高,不利于井下高温环境下延长牙轮钻头寿命。     

Fabrication of poly(ε‐caprolactone) (PCL)/poly(propylene carbonate) (PPC)/ethylene‐α‐octene block copolymer (OBC) triple shape memory blends with cycling performance by constructing a co‐continuous phase morphology

In this paper, a triple shape memory material was prepared by ultra‐simple melt blending from poly(ε‐caprolactone) (PCL), poly(propylene carbonate) (PPC) and ethylene‐α‐octene block copolymer (OBC). The obtained material possessed a co‐continuous phase morphology and presented an excellent triple shape memory effect (triple‐SME). Theoretical prediction demonstrated that a special continuous phase morphology could be constructed by adjusting the proportions of the blend. Moreover, the results indicated that a close relationship existed between the phase morphology and the triple‐SME of PCL/PPC/OBC. The sample with 35 vol% PPC content contributed to the formation of a continuous phase morphology and exhibited the optimal triple‐SME. Additionally, the sample PCL/PPC/OBC (32.5/35/32.5) showed outstanding structure and performance stability during cycle loading–unloading tests, which evidenced the prominent cycling shape memory property (nearly 100% shape fixing and recovery of temporary shape). Overall, this work could provide an efficient, convenient and recyclable method to obtain high‐performance shape memory materials. © 2020 Society of Chemical Industry     

Compiler compatible 5.66 Mb/mm2 8T 1R1W register file in 14 nm FinFET technology

1-read/1-write (1R1W) register file (RF) is a popular memory configuration in modern feature rich SoCs requiring significant amount of embedded memory. A memory compiler is constructed using the 8T RF bitcell spanning a range of instances from 32 b to 72 Kb. An 8T low-leakage bitcell of 0.106 μm² is used in a 14 nm FinFET technology with a 70 nm contacted gate pitch for high-density (HD) two-port (TP) RF memory compiler which achieves 5.66 Mb/mm² array density for a 72 Kb array which is the highest reported density in 14 nm FinFET technology. The density improvement is achieved by using techniques such as leaf-cell optimization (eliminating transistors), better architectural planning, top level connectivity through leaf-cell abutment and minimizing the number of unique leaf-cells. These techniques are fully compatible with memory compiler usage over the required span. Leakage power is minimized by using power-switches without degrading the density mentioned above. Self-induced supply voltage collapse technique is applied for write and a four stack static keeper is used for read Vmin improvement. Fabricated test chips using 14 nm process have demonstrated 2.33 GHz performance at 1.1 V/25 °C operation. Overall V_min of 550 mV is achieved with this design at 25 °C. The inbuilt power-switch improves leakage power by 12x in simulation. Approximately 8% die area of a leading 14 nm SoC in commercialization is occupied by these compiled RF instances.     

基于DEM的振动筛筛孔形状对潮湿原煤筛分效果影响的研究

随着原煤含水量的增加,引起原煤颗粒间相互粘聚,影响振动筛筛分效率。基于离散元法,运用EDEM软件模拟了潮湿原煤颗粒在圆形筛孔、方形筛孔和矩形筛孔的筛分过程,并且以筛分效率和阻碍粒排出率为衡量指标,对振动筛筛孔形状影响潮湿煤筛分效果进行了研究。结果表明:在筛孔名义尺寸相同的情况下,潮湿煤在矩形筛孔筛面上的筛分效果最好,方形筛孔次之,圆形筛孔最差。     

基于降噪时序深度学习网络的风电功率短期预测方法

利用风电场历史功率数据预测未来一段时间内的风功率,对保障电网安全稳定运行具有重要的意义。本文提出一种基于奇异谱分析SSA(singular spectrum analysis)和长短时记忆LSTM(long-short term memory net⁃work)网络的时序特征预测框架用于短期风功率的预测。首先通过SSA对历史风功率原始数据进行降噪处理,然后经过数据转换之后,以LSTM网络为基础进行预测模型的训练,最后通过某风电场提供的两个风机的历史功率数据进行验证。实验结果表明,奇异谱分析对风电场的历史数据具有良好的降噪性,SSA+LSTM模型在测试数据上取得了较好的预测性能,能够有效进行短期风功率的预测。     

Damping and mode shape modification for additively manufactured walls with captured powder

This paper describes the fabrication, modeling, and dynamic testing of laser powder bed fusion stainless steel walls with captured powder cores. The purpose of the study is to determine the increased structural damping, or energy dissipation, and mode shape modification caused by the inclusion of the unmelted powder core within the solid walls. It is shown experimentally that the damping increases with larger powder core width and that the damping addition is mode dependent. Damping increases over the solid wall values by factors of 2.9–225 are reported depending on the mode number and core width. It is also seen that the mode shapes are distorted relative to the solid wall results as the core width is increased and wall thickness is decreased. Comparisons with finite element models confirm this trend.